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PDL for FM0+
Version1.0
Peripheral Driverl Library for FM0+
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00001 /******************************************************************************* 00002 * Copyright (C) 2013 Spansion LLC. All Rights Reserved. 00003 * 00004 * This software is owned and published by: 00005 * Spansion LLC, 915 DeGuigne Dr. Sunnyvale, CA 94088-3453 ("Spansion"). 00006 * 00007 * BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND 00008 * BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT. 00009 * 00010 * This software contains source code for use with Spansion 00011 * components. This software is licensed by Spansion to be adapted only 00012 * for use in systems utilizing Spansion components. Spansion shall not be 00013 * responsible for misuse or illegal use of this software for devices not 00014 * supported herein. Spansion is providing this software "AS IS" and will 00015 * not be responsible for issues arising from incorrect user implementation 00016 * of the software. 00017 * 00018 * SPANSION MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE, 00019 * REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS), 00020 * ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING, 00021 * WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED 00022 * WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED 00023 * WARRANTY OF NONINFRINGEMENT. 00024 * SPANSION SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT, 00025 * NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT 00026 * LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION, 00027 * LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR 00028 * INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT, 00029 * INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA, 00030 * SAVINGS OR PROFITS, 00031 * EVEN IF SPANSION HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. 00032 * YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR 00033 * INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED 00034 * FROM, THE SOFTWARE. 00035 * 00036 * This software may be replicated in part or whole for the licensed use, 00037 * with the restriction that this Disclaimer and Copyright notice must be 00038 * included with each copy of this software, whether used in part or whole, 00039 * at all times. 00040 */ 00041 /******************************************************************************/ 00053 #ifndef __DMA_H__ 00054 #define __DMA_H__ 00055 00056 /******************************************************************************/ 00057 /* Include files */ 00058 /******************************************************************************/ 00059 #include "mcu.h" 00060 #include "pdl_user.h" 00061 00062 #if (defined(PDL_PERIPHERAL_DMA_ACTIVE)) 00063 00064 /* C binding of definitions if building with C++ compiler */ 00065 #ifdef __cplusplus 00066 extern "C" 00067 { 00068 #endif 00069 00097 00098 /******************************************************************************/ 00099 /* Global pre-processor symbols/macros ('#define') */ 00100 /******************************************************************************/ 00101 00102 #define DMA_CH_COUNT (4u) 00103 #define DMA_MAX_CH_INDEX (3u) 00104 00105 // register address offset 00106 #define DMA_DMACA_OFFSET 0x00ul 00107 #define DMA_DMACB_OFFSET 0x04ul 00108 #define DMA_DMASA_OFFSET 0x08ul 00109 #define DMA_DMADA_OFFSET 0x0Cul 00110 00111 /******************************************************************************/ 00112 /* Local type definitions ('typedef') */ 00113 /******************************************************************************/ 00114 00119 typedef enum en_dma_transfermode 00120 { 00121 DmaBlockTransfer = 0, 00122 DmaBurstTransfer = 1, 00123 DmaDemandTransfer = 2 00124 } en_dma_transfermode_t ; 00125 00130 typedef enum en_dma_transferwidth 00131 { 00132 Dma8Bit = 0, 00133 Dma16Bit = 1, 00134 Dma32Bit = 2 00135 } en_dma_transferwidth_t ; 00136 00141 typedef enum en_dma_idreq 00142 { 00143 Adc0 = 5, 00144 Adc1 = 6, 00145 Adc2 = 7, 00146 Bt0Irq0 = 8, 00147 Bt2Irq0 = 9, 00148 Bt4Irq0 = 10, 00149 Bt6Irq0 = 11, 00150 MfsRx0 = 12, 00151 MfsTx0 = 13, 00152 MfsRx1 = 14, 00153 MfsTx1 = 15, 00154 MfsRx2 = 16, 00155 MfsTx2 = 17, 00156 MfsRx3 = 18, 00157 MfsTx3 = 19, 00158 MfsRx4 = 20, 00159 MfsTx4 = 21, 00160 MfsRx5 = 22, 00161 MfsTx5 = 23, 00162 MfsRx6 = 24, 00163 MfsTx6 = 25, 00164 MfsRx7 = 26, 00165 MfsTx7 = 27, 00166 ExtIrq0 = 28, 00167 ExtIrq1 = 29, 00168 ExtIrq2 = 30, 00169 ExtIrq3 = 31, 00170 Software = 1234 00171 } en_dma_idreq_t ; 00172 00177 typedef enum dma_stop_cause 00178 { 00179 DmaStopByAddrOverflow = 0, 00180 DmaStopByTransferStopRqst = 1, 00181 DmaStopBySrcAccessError = 2, 00182 DmaStopByDstAccessError = 3, 00183 DmaStopByTransferComplete = 4, 00184 DmaStopByTransferPause = 5, 00185 00186 }en_dma_stop_cause_t; 00187 00192 typedef struct stc_dma_int_sel 00193 { 00194 boolean_t bCompleteInt; 00195 boolean_t bErrorInt; 00196 00197 }stc_dma_int_sel_t; 00198 00203 typedef struct stc_dma_int_cb 00204 { 00205 func_ptr_t pfnCompleteCallback; 00206 func_ptr_arg1_t pfnErrorCallback; 00207 00208 }stc_dma_int_cb_t; 00209 00214 typedef struct stc_dma_intern_data 00215 { 00216 func_ptr_t apfnDmaCallback[DMA_CH_COUNT]; 00217 func_ptr_arg1_t apfnDmaErrorCallback[DMA_CH_COUNT]; 00218 00219 } stc_dma_intern_data_t ; 00220 00225 typedef struct stc_dma_config 00226 { 00227 en_dma_idreq_t enDmaIdrq ; 00228 uint8_t u8BlockCount ; 00229 uint16_t u16TransferCount ; 00230 en_dma_transfermode_t enTransferMode ; 00231 en_dma_transferwidth_t enTransferWdith ; 00232 uint32_t u32SourceAddress; 00233 uint32_t u32DestinationAddress ; 00234 boolean_t bFixedSource ; 00235 boolean_t bFixedDestination ; 00236 boolean_t bReloadCount ; 00237 boolean_t bReloadSource ; 00238 boolean_t bReloadDestination ; 00239 boolean_t bEnableBitMask ; 00240 } stc_dma_config_t ; 00241 00242 /******************************************************************************/ 00243 /* Global variable definitions ('extern') */ 00244 /******************************************************************************/ 00245 extern stc_dma_intern_data_t stcDmaInternData; 00246 00247 /******************************************************************************/ 00248 /* Global function prototypes (definition in C source) */ 00249 /******************************************************************************/ 00250 #if (PDL_INTERRUPT_ENABLE_DMA0 == PDL_ON) || (PDL_INTERRUPT_ENABLE_DMA1 == PDL_ON) || \ 00251 (PDL_INTERRUPT_ENABLE_DMA2 == PDL_ON) || (PDL_INTERRUPT_ENABLE_DMA3 == PDL_ON) 00252 void DmaIrqHandler(uint8_t u8DmaChannel) ; 00253 00254 en_result_t Dma_EnableInt(uint8_t u8DmaChannel, 00255 stc_dma_int_sel_t* pstcIntSel, 00256 stc_dma_int_cb_t* pstcIntCb ); 00257 en_result_t Dma_DisableInt(uint8_t u8DmaChannel, 00258 stc_dma_int_sel_t* pstcIntSel ); 00259 #endif 00260 00261 en_result_t Dma_Init_Channel(uint8_t u8DmaChannel, volatile stc_dma_config_t* pstcConfig); 00262 00263 en_result_t Dma_DeInit_Channel(uint8_t u8DmaChannel); 00264 00265 en_result_t Dma_SetChannel (uint8_t u8DmaChannel, 00266 boolean_t bEnable, 00267 boolean_t bPause, 00268 boolean_t bSoftwareTrigger) ; 00269 00270 en_dma_stop_cause_t Dma_GetStopCause(uint8_t u8DmaChannel); 00271 00272 en_result_t Dma_Enable(void) ; 00273 00274 en_result_t Dma_Disable(void) ; 00275 00276 00277 00279 00280 #ifdef __cplusplus 00281 } 00282 #endif 00283 00284 #endif // #if (defined(PDL_PERIPHERAL_DMA_ACTIVE)) 00285 00286 #endif /* __DMA_H__ */ 00287 /******************************************************************************/ 00288 /* EOF (not truncated) */ 00289 /******************************************************************************/